Recently, as the need for sophistication and miniaturization of electronic devices has been increased, the technique for high-density package of semiconductor integrated circuits has been developed. One example of such packaging techniques is a chip-on-chip type System in Package (SiP) in which a semiconductor chip is mounted on another semiconductor chip face down. Attention is focused on this structure because it allows thickness reduction of packages and is excellent in reliability of electrical connection.
In a chip-on-chip type SiP, connection between semiconductor chips is provided via fine bumps according to a flip-chip method. In this case, in order to ensure electrical connection strength and mechanical connection strength, a filling resin is injected into the position between the semiconductor chips (underfill filling). However, in this step of underfill filling, the filling resin injected between the semiconductor chips bleeds and an external electrode provided on the surface of the lower semiconductor chip is contaminated thereby, and for this reason, there is a problem that it is impossible to perform wire bonding.
Methods in which electrical connection and filling between terminals are performed together via an anisotropic conductive film are also known. For example, Japanese Laid-Open Patent Publication No. 61-276873 (Patent Document 1) describes an adhesive tape including solder particles. The document describes a method in which the adhesive tape is interposed between members to be subjected to thermocompression bonding, and thereby solder particles are interposed between electrical connection portions of the members and other portions are filled with a resin component. Further, Japanese Patent No. 3769688 (Patent Document 2) describes a method of connecting terminals using an electrically conductive adhesive including electrically conductive particles and a resin component which is not completely cured at the meting point of the electrically conductive particles.
However, even if these methods are used, it is difficult to ensure electrical connection reliability between semiconductor chips and ion migration resistance of resin after filling. For this reason, none of these methods realized further improvement of density increase of semiconductor integrated circuits in chip-on-chip type SiPs.